M50FW080N1 - ST MICROELECTRONICS M50FW080N1 Chipset - 8 Mbit (1M x8, Uniform...
- Part Number:
- M50FW080N1
- Model Number:
- M50FW080N1
- Make:
- ST MICROELECTRONICS
- Lead Time:
- Available
- Qty In Stock:
- Available
ST MICROELECTRONICS M50FW080N1 Chipset - 8 Mbit (1M x8, Uniform Block) 3V Supply Firmware Hub Flash Memory Simple Type: Chipset
The M50FW080 is an 8 Mbit (1Mbit x8) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (3.0 to 3.6V) supply. For fast programming and fast erasing in production lines an optional 12V power supply can be used to reduce the programming and the erasing times. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Blocks can be protected individually to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents.
For Resellers and High Volume Orders:
Please request a quote to obtain preferred pricing.
Features
- 16 UNIFORM 64 KByte MEMORY BLOCKS
- ELECTRONIC SIGNATURE – Manufacturer Code: 20h, – Device Code: 2Dh
- FIRMWARE HUB (FWH) HARDWARE INTERFACE MODE – 5 Signal Communication Interface
- FOR USE in PC BIOS APPLICATIONS
- PROGRAM and ERASE SUSPEND – Read other Blocks during Program/Erase Suspend, – Program other Blocks during Erase Suspend
- PROGRAM/ERASE CONTROLLER – Embedded Byte Program and Block/Chip Erase algorithms, – Status Register Bits
- PROGRAMMING TIME – 10µs typical, – Quadruple Byte Programming Option
- TWO INTERFACES – Firmware Hub (FWH) Interface for embedded operation with PC Chipsets, – Address/Address Multiplexed (A/A Mux) Interface for programming equipment compatibility
- SUPPLY VOLTAGE – VCC = 3V to 3.6V for Program, Erase and Read Operations, – VPP = 12V for Fast Program and Fast Erase (optional)
- supporting Read and Write Operations, – Hardware Write Protect Pins for Block Protection, – Register Based Read and Write Protection, – 5 Additional General Purpose Inputs for platform design flexibil
Specifications
- Clock (CLK): The Clock, CLK, input is used to clock the signals in and out of the Input/Output Communication Pins, FWH0-FWH3. The Clock conforms to the PCI specification.
- CPU Reset (INIT): The CPU Reset, INIT, pin is used to Reset the memory when the CPU is reset. It behaves identically to Interface Reset, RP, and the internal Reset line is the logical OR (electrical AND) of RP and INIT.
- Interface Reset (RP): The Interface Reset (RP) input is used to reset the memory. When Interface Reset (RP) is set Low, VIL, the memory is in Reset mode: the outputs are put to high impedance and the current consumption is minimized. When RP is set High, VIH, the memory is in normal operation. After exiting Reset mode, the memory enters Read mode.
- Ready/Busy Output (RB): The Ready/Busy pin gives the status of the memory’s Program/Erase Controller. When Ready/Busy is Low, VOL, the memory is busy with a Program or Erase operation and it will not accept any additional Program or Erase command except the Program/Erase Suspend command. When Ready/Busy is High, VOH, the memory is ready for any Read, Program or Erase operation.
- Row/Column Address Select (RC): The Row/Column Address Select input selects whether the Address Inputs should be latched into the Row Address bits (A0-A10) or the Column Address bits (A11-A19). The Row Address bits are latched on the falling edge of RC whereas the Column Address bits are latched on the rising edge.
- Supply Signal Descriptions: The Supply Signals are the same for both interfaces.
- Top Block Lock (TBL): The Top Block Lock input is used to prevent the Top Block (Block 15)
- VCC Supply Voltage: The VCC Supply Voltage supplies the power for all operations (Read, Program, Erase etc.). The Command Interface is disabled when the VCC Supply Voltage is less than the Lockout Voltage, VLKO. This prevents Bus Write operations from accidentally
- VPP Optional Supply Voltage.: The VPP Optional Supply Voltage pin is used to select the Fast Program (see the Quadruple Byte Program Command description) and Fast Erase options of the memory and to protect the memory. When VPP < VPPLK Program and Erase operations cannot be performed and an error is reported in the Status Register if an attempt to change the memory contents is made. When VPP - VCC Program and Erase operations take place as normal. When VPP - VPPH Fast Program (if A/A Mux interface is selected) and Fast Erase operations are used. Any other voltage input to VPP will result in undefined behavior and should not be used.
- Write Enable (W): The Write Enable, W, controls the Bus Write operation of the memory’s Command Interface.
- Write Protect (WP): The Write Protect input is used to prevent the Main Blocks (Blocks 0 to 14) from being changed. When Write Protect, WP, is set Low, VIL, Program and Block Erase operations in the Main Blocks have no effect, regardless of the state of the Lock Register. When Write Protect, WP, is set High, VIH, the protection of the Block determined by the Lock Register. The state of Write Protect, WP, does not affect the protection of the Top Block (Block 15). Write Protect, WP, must be set prior to a Program
Applications
- None Available
Aliases
- None Available